1. Technical Field
The present invention relates to a vertical MOSFET.
2. Related Art
It is known that small steps in a stepped shape on a surface of an silicon carbide substrate trap carriers, thereby reducing mobility. Therefore, the (0001) surface is designated as the main surface and an off-angle is formed in the <11-20> direction, such that the current does not cut across these small steps, such as shown in Patent Document 1, for example. Furthermore, by setting the off-angle to be greater than or equal to 50° and less than or equal to 60° relative to the {0001} surface of the silicon carbide substrate, the interface trap density is reduced and the channel mobility is improved, as shown in Patent Document 2, for example. In this way, in a silicon carbide substrate, attempts are made to improve the mobility by reducing the carrier trapping. The mobility can also be expressed as the static characteristics of the semiconductor device during conduction.
Patent Document 1: Japanese Patent Application Publication No. H10-107263
Patent Document 2: International Publication WO 2010/116886
The inventors of the invention according to the present application confirmed that gallium nitride (abbreviated below as GaN) has hole mobility anisotropy according to the crystal axis direction. The hole mobility affects the dynamic characteristics when the semiconductor device is turned ON/OFF. For example, in a p-type well region where a channel region of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is formed, the dynamic characteristics of the MOSFET become worse when the resistance in the direction in which the hole current flows is higher. Due to the resistance per unit length of the current path, the resistance becomes higher when the hole movement distance is longer.
Specifically, when an ON voltage is applied to the gate, the charging rate of the pn junction capacitance between the p-type well region and the n-type drift layer becomes slower. Therefore, the switching characteristics become worse when the semiconductor device is ON. In addition, due to a transient response during the turn-OFF immediately after the OFF voltage is applied to the gate, the resistance of the p-type well region causes the potential rise of the p-type well region. As a result, dielectric breakdown occurs between the p-type well region and metal electrode. In addition, when the potential of the p-type well region rises, there is a problem that the parasitic BJT (Bipolar Junction Transistor) of the MOSFET is turned ON.
Therefore, in order to improve the dynamic characteristics of a vertical MOSFET using GaN, it is an objective of the present invention to reduce the resistance of a current path with a long hole movement distance in a p-type well.